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ARM Compiler toolchain Assembler Reference    Version 5.01
Home > ARM and Thumb Instructions > General data processing instructions > REV, REV16, REVSH, and RBIT
REV, REV16, REVSH, and RBIT
Reverse bytes or bits within words or halfwords.
Show/hideSyntax
op{cond} Rd, Rn
where:
op
is any one of the following:
REV
Reverse byte order in a word.
REV16
Reverse byte order in each halfword independently.
REVSH
Reverse byte order in the bottom halfword, and sign extend to 32 bits.
RBIT
Reverse the bit order in a 32-bit word.
cond
is an optional condition code.
Rd
is the destination register.
Rn
is the register holding the operand.
Show/hideUsage
You can use these instructions to change endianness:
REV
converts 32-bit big-endian data into little-endian data or 32-bit little-endian data into big-endian data.
REV16
converts 16-bit big-endian data into little-endian data or 16-bit little-endian data into big-endian data.
REVSH
converts either:
16-bit signed big-endian data into 32-bit signed little-endian data
16-bit signed little-endian data into 32-bit signed big-endian data.
Show/hideRegister restrictions
You cannot use PC for any register.
You can use SP in ARM instructions but these are deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.
Show/hideCondition flags
These instructions do not change the flags.
Show/hide16-bit instructions
The following forms of these instructions are available in Thumb code, and are 16-bit instructions:
REV Rd, Rm
Rd and Rm must both be Lo registers.
REV16 Rd, Rm
Rd and Rm must both be Lo registers.
REVSH Rd, Rm
Rd and Rm must both be Lo registers.
Show/hideArchitectures
Other than RBIT, these ARM instructions are available in ARMv6 and above.
The RBIT ARM instruction is available in ARMv6T2 and above.
These 32-bit Thumb instructions are available in ARMv6T2 and above.
These 16-bit Thumb instructions are available in ARMv6 and above.
Show/hideExamples
    REV     r3, r7
    REV16   r0, r0
    REVSH   r0, r5       ; Reverse Signed Halfword
    REVHS   r3, r7       ; Reverse with Higher or Same condition
    RBIT    r7, r8