26

Odp: pokey w FPGA

sid ma duzo analogowego smiecia w srodku, ktore bedzie stanowic spore wyzwanie, a sid bez filtrow to malo tego sida

ricoh jest po prostu troche latwiejszy, a co wiecej procesor ktory natywnie gra te muzyczki to tez 6502 wiec latwiej o example

co do ym'a to czemu nie, tylko musze poczytac co i z czym, no i bede potrzebowal examplow

tutaj digi

a tutaj instrumentarium analmux'a bez supportu dla dual tone generator'a

a tutaj juz z

przechodze na tumiwisizm

27

Odp: pokey w FPGA

z sidem zajxxxsta szkoda, co do ay to moge cos napisac tylko trzeba sie umowic co do komunikacji a aygrekiem,
AYcontrol = $fffd
AYdata = $bffd
gdzie dla atari beda widoczne te rejestry i czy ma znaczenie ktory bedzie zapisany pierwszy.
a moze tych 16 rejestrow zamapowane bedzie od d600-d60f ? tak by bylo ZNACZNIE latwiej

skopiowane gdzies z sieci - teraz nie moge namierzyc:

The AY-3-8910/8912 contains 16 internal registers as follows:

Register        Function                        Range

0              Channel A fine pitch            8-bit (0-255)
1              Channel A course pitch          4-bit (0-15)
2              Channel B fine pitch            8-bit (0-255)
3              Channel B course pitch          4-bit (0-15)
4              Channel C fine pitch            8-bit (0-255)
5              Channel C course pitch          4-bit (0-15)
6              Noise pitch                     5-bit (0-31)
7              Mixer                           8-bit (see below)
8              Channel A volume                4-bit (0-15, see below)
9              Channel B volume                4-bit (0-15, see below)
10              Channel C volume                4-bit (0-15, see below)
11              Envelope fine duration          8-bit (0-255)
12              Envelope course duration        8-bit (0-255)
13              Envelope shape                  4-bit (0-15)
14              I/O port A                      8-bit (0-255)
15              I/O port B                      8-bit (0-255)

Notes:

- The AY-3-8912 does not contain register 15.
- The volume registers (8, 9 and 10) contain a 4-bit setting but if bit
  5 is set then that channel uses the envelope defined by register 13 and
  ignores its volume setting.
- The mixer (register 7) is made up of the following bits (low=enabled):

Bit: 7        6        5        4        3        2        1        0
   _         _
   I/O       I/O   Noise    Noise    Noise     Tone     Tone     Tone
     B        A        C        B        A        C        B        A

   The AY-3-8912 ignores bit 7 of this register.

Envelopes
---------

The AY-3-8910/8912 contains the following preset envelopes or waveforms (set
using control register 13). Note that these affect volume only and not the
pitch:

0      \__________     single decay then off

4      /|_________     single attack then off

8      \|\|\|\|\|\     repeated decay

9      \__________     single decay then off

10      \/\/\/\/\/\     repeated decay-attack
          _________
11      \|              single decay then hold

12      /|/|/|/|/|/     repeated attack
         __________
13      /               single attack then hold

14      /\/\/\/\/\/     repeated attack-decay

15      /|_________     single attack then off

Pitch values
------------

The course and fine pitch registers for each channel are used in the
following fashion (assuming channel A):

Registers 0 and 1 operate together to form channel A's final pitch. The eight
least significant bits are sent to register 0 and the four most significant
bits are sent to register 1. The output frequency is equal to the IC's
incoming clock frequency divided by 16 and then further divided by the number
written to the course and fine pitch registers, so the higher the number
written to these, the lower the pitch. For example, if a frequency of 1KHz
was required and the IC's clock frequency was 1MHz, a total division rate
of 1000 would be needed. The sound generator itself divides by 16 so the
course and fine pitch registers must provide a further division by 62.5 (due
to the fact that 1000/16 is 62.5). A division rate of 62 or 63 will be
accurate enough, since the registers can only store whole numbers. Therefore,
62 or 63 would be written to register 0 and 0 would be written to register
1.

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28

Odp: pokey w FPGA

YERZMYEY/HOOY-PROGRAM napisał/a:

Myślę, że bez kalkulatora CITIZEN ten projekt nie miałby szans na powodzenie.

Sądzę raczej, że kluczową rolę odgrywa tu ten druk przelewu za jakiś rachunek. Im więcej takich na stole tym większą człowiek ma motywację do pracy na której można zarobić :)

The problem is not the problem; the problem is your attitude about the problem

29

Odp: pokey w FPGA

xxl: generalnie gra, ale cos ci zostalo na d400 - pojedyncze dzwieki

przechodze na tumiwisizm

30

Odp: pokey w FPGA

na d4 jest antic, ten player korzysta z antica (synchronizacja) ale nie zapisuje tam dzwieku, VBI atari os tez dziala wiec zapisuje tam wartosci ale nie sa to wartosci dzwiekowe plajera sidow...

http://atari.pl/hsc/ad.php?i=1.